The VDF Alliance began in early 2019 to evaluate the feasibility of developing fast, open, hardware for computing Verifiable Delay Functions (VDFs). To begin, the team developed CPU and FPGA implementations of an RSA VDF to better understand their potential for hardware acceleration. These implementations were used to solve a 20-year-old cryptographic puzzle at MIT in two months. Now the VDF Alliance is open-sourcing these designs and inviting the community to make them even faster.
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